Analysis and Design Methodology for Power Gating in VLSI Circuits
In this dissertation, we focus on the system level power gating and we analyze its impact on noise, power, area and performance. We propose several design methodologies to optimize power gating during physical design stage.In this dissertation, we focus on the system level power gating and we analyze its impact on noise, power, area and performance. We propose several design methodologies to optimize power gating during physical design stage.
| Title | : | Analysis and Design Methodology for Power Gating in VLSI Circuits |
| Author | : | Hailin Jiang |
| Publisher | : | ProQuest - 2007 |
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